Mohamed AbdElSalam received his B.Sc. and M.S Degree from Ain-Shams University, Cairo, Egypt, and Doctor of Information Science and Technology from Osaka University, Osaka, Japan. He joined Mentor Graphics 1998-2002 working in development of circuit simulation and IC layout tools in CSD, and development of FPGA Advantage/HDS tool in DCS, and again in 2008 to present, in Global R&D Egypt MED solutions as Principal Engineer, working on hardware emulation targets, Memory softmodels, Virtual Device Solutions and recently as Software Engineering Director for new solutions targeting vertical market segments for Pre-Silicon Autonomous Verification Environment (PAVE360 Solutions), Cloud Connectivity and ML/AI applications. Mohamed AbdElSalam invented new techniques in the area of functional verification including Hybrid In-Circuit Emulation and Virtual Devices as Verification Components in SoC Verification Platforms. He has many publications in the area of real-time systems, HW/SW Co-design and System Level Modeling.